1. Technical Field
The present disclosure relates to a semiconductor device and to a method of fabricating the same, and more particularly, to a magnetic memory device and to a method of fabricating the same.
2. Description of the Related Art
With the development of the electronics industry including, for example, mobile communications and computers, the demand for semiconductor devices having characteristics such as rapid read/write speed, nonvolatility, and a low operating voltage has increased. However, currently used memory devices, such as a static random access memory (SRAM), a dynamic random access memory (DRAM), and a flash memory, may not satisfy all these requirements.
For example, as a unit cell of the DRAM typically includes a single capacitor and a single transistor for controlling the capacitor, it may require a larger area than a unit cell of a NAND (Not AND) flash memory. Moreover, as is well known in the art, the DRAM, which stores data in the capacitor, is a volatile memory device that needs a refresh operation. Furthermore, the SRAM operates at high speed, but it is also a volatile memory device. Additionally, a unit cell of the SRAM is typically comprised of 6 transistors, so it may occupy a very large area. Further, although the flash memory is a nonvolatile memory device and (especially, for example, the NAND flash memory) has the highest integration density of present memory devices, it still operates at low speeds.
For at least the above-mentioned reasons, there have been extensive studies on new memory devices, such as magnetic random access memories (MRAMs), which are capable of fast read/write operations, exhibit nonvolatility, need no refresh operations, and operate at a low voltage.
Typically, the MRAM includes a magnetic tunnel junction (MTJ) for storing data. For example, referring to FIG. 1, which is a cross sectional view of an MTJ 60 of a conventional MRAM, the MTJ 60 includes a pinning layer 10, a pinned layer 20, an insulation layer 30, a free layer 40, and a capping layer 50. The pinning layer 10 is formed of an anti-ferromagnetic layer, while each of the pinned layer 20 and the free layer 40 is formed of a ferromagnetic layer having a magnetic hysteresis.
In this case, the magnetic polarization of the pinned layer 20 is fixed due to anti-ferromagnetic coupling (AFC) between the pinning layer 10 and the pinned layer 20. However, in the conventional art, as the free layer 40 does not come into contact with any anti-ferromagnetic layer, the magnetic polarization of the free layer 40, unlike the pinned layer 20 is not fixed. Thus, the magnetic polarization of the free layer 40 may be parallel or anti-parallel to that of the pinned layer 20.
As is well known, the electrical resistance of the MTJ 60 is dependent on the magnetic polarizations of the free layer 40 and the pinned layer 20. Specifically, the electrical resistance of the MTJ 60 is greater when the magnetic polarization of the free layer 40 is anti-parallel to that of the pinned layer 20 than when the magnetic polarization of the free layer 40 is parallel to that of the pinned layer 20. The electrical resistance of the MTJ 60, which depends on the magnetic polarizations of the free layer 40 and the pinned layer 20, may be utilized to read data stored in the MRAM. For example, data stored in the MTJ 60 may be read by measuring a current flowing through the MTJ 60.
The magnetic polarization of the free layer 40 may be switched by controlling a magnetic field generated around interconnection lines (e.g., bit lines (BLs) and digit lines (DLs) adjacent to the MTJ 60. As a result, magnetic field applied from external interconnection lines may be used to change the electrical resistance of the MTJ 60. This characteristic is typically referred to as the “magnetoresistance (MR) of the MTJ 60,” and the efficiency of the MR is expressed by an MR ratio.
Meanwhile, a conventional method of fabricating an MRAM typically involves thermally treating the MTJ 60 at a temperature of about 360° C. As a result, the free layer 40 is crystallized to enhance the characteristics of the MTJ 60. However, this high-temperature thermal treatment may lead to the intermixture of the free layer 40 and the capping layer 50, thereby sharply reducing the MR ratio. Therefore, there is a need to develop a new technique of inhibiting the intermixture of the free layer 40 and the capping layer 50.